The present invention relates to an improved magnetic head driving unit for driving a positioning mechanism of a magnetic head.
In general, the operations of a magnetic disk unit can be classified roughly into four modes: positioning (normally referred to as a seek operation) of a magnetic head (head), a search operation for collating a desired record, data write operation and data read operation. The positioning of the head is normally performed by a driving unit as shown in FIG. 1.
The magnetic disk unit is provided with a servo head for reading a servo data from the disk and a read/write head for reading and writing data from or into the disk. These heads are mounted on a carriage 1. The motion of the carriage 1 performs a seek operation. The carriage 1 is driven by an actuator motor 1 which is usually a voice coil motor. Reading data from a disk, the servo head supplies the data to the position detector 3. The position detector 3 produces a head position signal a and a cylinder pulse SP each time the servo head traverses a track on the disk. The cylinder pulse SP is supplied to a microprocessor 4. The microprocessor 4 computes the difference between a track on which head currently positions and a target track specified by a host system. The current head position on the track can be derived from the cylinder pulse SP. The microprocessor 4, then loads target velocity data into a register 5. This data (digital) is associated with a target velocity signal (analog) corresponding to the difference between tracks. Various target velocity data corresponding to the track differences may be prestored in a read only memory (ROM) 4a in a microprocessor 4 as a reference table. The target velocity data in the register 5 is then fed to a digital/analog converter 6 (D/A converter). The D/A converter 6 converts the target velocity data in digital form into a target velocity signal in analog form (normally, a voltage signal) to be supplied to a summing amplifier 7. The output of the D/A converter 6 is supplied to an analog switch 10c which is controlled by a control signal from the microprocessor 4.
The position detector 3 produces the position signal a to a phase compensator 13 and a differentiator 9. The differentiator 9 differentiates the position signal a to perform a velocity signal, which is supplied to a summing amplifier 7 through an analog switch 10a, for example model LF 13201 manufactured by National Semiconductor Corporation. At this time, an analog switch 10b is closed to prevent the supplement of the output signal from the phase compensator 13 to the summing amplifier 7. Also, the analog switches 10a, 10b and 10c are controlled by the control signal from the microprocessor 4. The summing amplifier 7 performs subtraction between the target velocity signal and the velocity signal from the differentiator 9 and produces an output signal corresponding to the velocity difference. This output signal is supplied to a power amplifier 8. The power amplifier 8 supplies a driving current corresponding to the output signal from the summing amplifier 7 to the actuator motor 2. Therefore, the actuator motor 2 drives a carriage 1 with acceleration corresponding to the output signal from the summing amplifier 7. Then, the cylinder pulse SP from the position detector 3 is supplied to the microprocessor 4 every time the head crosses the track. Receiving the cylinder pulse SP, the microprocessor 4 computes again the difference between the currently head-positioned track and the target track. Then, the microprocessor 4 accesses the reference table in the ROM 4a in accordance with the updated track difference to obtain the target velocity data, which is again loaded in the register 5. Thus, the velocity control of the carriage 1 is performed. The microprocessor 4 may be constructed by a 8-bit microprocessor 8085 manufactured by Intel, Co. USA.
When the head reaches the target track, the analog switch 10a and 10c turn off and the analog switch 10b turns on. Then, a closed loop comprising the phase compensator 13, analog switch 10b, summing amplifier 7, power amplifier 8, motor 2, carriage 1 and position detector 3 is formed to accurately fix the head on the target track.
The maximum value of the driving current (maximum current) supplied to the actuator motor 2 is constrained to a predetermined value by the summing amplifier 7 which normally becomes an input stage for the power amplifier 8. This is because the restraint of the maximum current at the power amplifier 8 increases the tolerances of the power source and winding resistance of the actuator motor 2. The restraint of the maximum current is implemented by a limiter 12 provided at the summing amplifier 7 as shown in FIG. 2. That is, any of the input signals V1, V2 or V3 from the analog switch 10b, the analog switch 10c or analog switch 10a is input through registers R1, R2 or R3 respectively to one input terminal (negative) of an operational amplifier 11 (op amp). The positive terminal of the op amp 11 is grounded through a resistor R4. Further, a limiter 12 and a resistor R5 are parallely connected between the output terminal and the negative input terminal of the op amp 11.
From the output terminal of the op amp 11, the output voltage V0 of which amplitude is restrained by the limiter 12 is produced to be supplied to the power amplifier 8 shown in FIG. 1. The limiter 12 may be constructed with any of the known circuits shown in FIGS. 3A to 3D. The limiter 12 may also be an open circuit. In these circuits shown in FIGS. 3A to 3D, D1, D2, D3 denote zener diodes, D4 and D5, diodes and Ra through Rd, resistors.
FIGS. 4A through 4E show characteristics of any of the input voltages (V1, V2, V3) and output voltage V0. FIG. 4A shows a contour of the input and output voltages of the summing amplifier 7 when the limiter 12 is an open circuit. FIGS. 4B through 4E show individual contours of the input voltages V1, V2, V3 and output voltage V0 of the summing amplifier 7 when the circuits shown in FIGS. 3A through 3D apply to the limiter 12. In FIGS. 4B, 4C and 4E, V.sub.D1 and V.sub.D3 denote reverse voltages of the zener diodes, V.sub.Z2 and V.sub.Z3 denote forward voltages of the zener diodes and V.sub.D denotes forward voltage of the diode. The maximum current for the actuator motor 2 is thus restrained, so that the maximum current normally flows for short time at the initial of the velocity control period of the carriage 1 when the head is positioned.
In worst case, however, such abnormal situation may occur that the maximum current continues to flow until the power supply for the actuator motor 2 turns off. As a result, the overrun of the actuator motor 2 damages a magnetic disk or a mechanical sections of the access mechanism. Further, in a magnetic disk unit adopting high density recording, slight (minute) mismatching of alignment of the heads or mismatching of the individual mechanical sections of the access mechanism may occur, thereby loosening compatible recording. To solve the above drawbacks, the prior art system adopts a particular circuit for detecting the abnormal conditions, stopping the power supply to the actuator motor 2, and retracting the head. However, the above circuit does not always function satisfactorily due to the operating time restriction etc. Therefore, it is difficult to implement a perfect prevention of such abnormal status.